An all-digital phase locked loop (ADPLL) locks a phase of an oscillator signal which is outputted from the ADPLL, to a phase of a reference signal. In some approaches, the ADPLL utilizes a closed-loop feedback mechanism, which feeds the oscillator signal back to a phase detector. The phase detector then detects a phase difference between the oscillator signal and the reference signal, such that the phase of the oscillator signal is adjusted by a local oscillator in response to the detected phase difference.